Field of the Invention
The invention relates to a semiconductor device and to a converter device. The semiconductor device has a semiconductor component, which has a plurality of terminal regions, and a housing element, in which the semiconductor component is accommodated. At least one capacitive element is provided in an integrated manner in the housing element or in the region thereof. The capacitive element in each case has a first electrode region, a second electrode region and a dielectric region essentially provided in between. At least one electrode region of the capacitive element is electrically contact-connected to a terminal region of the semiconductor component. The respective capacitive element is able to suppress high-frequency electrical interference signals between the terminal regions.
When using semiconductor devices, in addition to the desired function, under certain circumstances, interference signals are also generated through the operation of the semiconductor devices. In order to reduce the interference signals generated during operation of the semiconductor devices and the undesired influence of the signals on the operation and function of a circuit configuration, provision is usually made of specific shielding devices and/or filter devices in explicit form in the region of the circuit configuration.
By way of example, it is known, in the case of semiconductor devices, to form filter elements between different terminal elements of the semiconductor device, in the simplest case for example a capacitor provided between two terminal elements, which filter elements can then at least partly suppress interference signals which occur during operation.
The provision of such explicit filter elements results in an additional outlay with regard to mounting.
It is accordingly an object of the invention to provide a semiconductor device and a converter device that overcome the above-mentioned disadvantages of the prior art devices of this general type, in which high-frequency interference signals that arise can be suppressed in a particularly simple manner. Furthermore, the intention is to specify a converter device in which high-frequency interference signals are suppressed in a particularly simple manner.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor device. The semiconductor device contains a semiconductor component having a plurality of terminal regions, a housing element accommodating the semiconductor component, and at least one capacitive element disposed in an integrated manner in the housing element or in a region of the housing element. The capacitive element has a first electrode region, a second electrode region and a dielectric region substantially disposed in-between the first electrode region and the second electrode region. At least one of the first and second electrode regions of the capacitive element is electrically contact-connected to one of the terminal regions of the semiconductor component. The capacitive element suppressing high-frequency electrical interference signals between the terminal regions. The capacitive element also functions as an insulator element having an insulation region being the dielectric region and an electrically conductive surface region being the first electrode region disposed on the insulation region. The semiconductor component and the first insulator element are stacked directly one above another in a sandwich-shaped manner.
In known semiconductor devices, in particular in transistor devices or the like, a semiconductor component is provided, in particular a transistor, which has a plurality of terminal regions. Furthermore, in the known semiconductor device, a housing element is formed, in which at least the semiconductor component is accommodated.
The semiconductor device according to the invention, in particular the transistor device, is characterized in that at least one capacitive element or capacitor element is provided in an integrated manner in the housing element or in the region thereof. The capacitive element in each case has a first electrode region, a second electrode region and a dielectric region essentially provided in-between. At least one electrode region of the capacitive element is electrically contact-connected to a terminal region of the semiconductor component in such a way that the respective capacitive element can suppress high-frequency electrical interference signals between terminal regions, in particular essentially by short-circuiting.
It is thus a fundamental aspect of the present invention to form the capacitor in an integrated manner in the housing element of the semiconductor device, or in an integrated manner in the region thereof, which capacitor is connected up to the terminal regions of the underlying semiconductor component in such a way that interference signals, in particular high-frequency interference signals, which are generated through the operation of the semiconductor component can be suppressed, essentially short-circuiting being appropriate in particular in the high-frequency range.
In an advantageous manner, each of the electrode regions of the capacitive element is electrically contact-connected to a respective terminal region of the semiconductor component. What is thereby achieved is that precisely two terminal regions of the semiconductor component are connected in parallel with the corresponding capacitive element, resulting in the suppression precisely of high-frequency interference on account of the impedancexe2x80x94which is low for high frequenciesxe2x80x94of the parallel-connected capacitive element through a short circuit. This is particularly important in the case of so-called common-mode interference, e.g. in switched-mode power supplies.
In a particularly preferred embodiment of the semiconductor device according to the invention, the semiconductor component is a transistor, in particular a field-effect transistor, having in each case a source terminal, a drain terminal and a gate terminal as terminal regions.
In this case, it is particularly appropriate for the first electrode region, that is to say the first electrode of the capacitive element, that is to say of the capacitor, to be connected to the drain terminal of the transistor.
In addition, the second electrode region, that is to say the second electrode of the capacitive element, can, moreover, be connected to the source terminal of the transistor.
The last-mentioned measures thus advantageously result in interference suppression with regard to the so-called high-voltage terminals of corresponding transistor devices.
The second electrode terminal mayxe2x80x94if appropriate instead of contact-connection to a source region or source terminalxe2x80x94also be configured to be externally connectable, in particular, or be connected to a shielding region, to a ground terminal or the like.
For the concrete configuration of the capacitive element, highly varied measures can be implemented in the region of the housing element.
In accordance with a preferred embodiment of the semiconductor device according to the invention, it is provided that a first insulator element is provided in the housing element. In this case, the first insulator element has an insulation region and thereon an essentially electrically conductive surface region, in particular a metal layer or the like. Preferably, the electrically conductive surface region of the first insulator element is provided as the first electrode region of the capacitive element.
Furthermore, it is provided that the insulation region of the first insulator element is used as the dielectric region of the capacitive element.
It is furthermore advantageous if, for the further configuration of the capacitive element, there is provided as the second electrode region a second, essentially electrically conductive surface region, in particular a second metal layer or the like, on the insulation region of the first insulator element, which is essentially opposite to or opposite in particular the first, essentially electrically conductive surface region.
On the other hand, it is also conceivable for a second insulator element to be provided in the housing element or in the region thereof. The second insulator element has an insulation region and thereon an essentially electrically conductive surface region, in particular a second metal layer or the like, the electrically conductive surface region of the second insulator element being used as the second electrode region of the capacitive element.
In accordance with a further preferred embodiment of the semiconductor device according to the invention, it is provided that the first and second insulator elements are disposed in direct proximity to one another, in particular in contact with one another, in such a way that the essentially electrically conductive surface regions thereof are essentially opposite one another or opposite to one another.
A particularly space-saving configuration for the semiconductor device according to the invention, which configuration is simple with regard to mounting, results if the first insulator element bears with its insulation region or with a part thereof on the second insulator element, in particular on the essentially electrically conductive surface region of the second insulator element or a part thereof.
In addition to the insulation function and the function of forming the second electrode of the capacitive element in the housing element, the second insulator element may additionally be provided as a carrier element that supports the first insulator element and/or the semiconductor component in and/or with the housing element.
In this case, the second insulator element is preferably configured as a lead frame or the like. On the other hand, it is also possible explicitly to provide a carrier element that retains the first insulator element, the second insulator element and/or the semiconductor component in and/or with the housing element.
In this case, too, the explicitly provided carrier element is advantageously a lead frame or the like.
Furthermore, a particularly space-saving and geometrically simple configuration results if the semiconductor component, the first insulator element, the second insulator element and/or the carrier element are configured as plate elements with essentially planar surface regions.
In that case, but also otherwise, it is provided, if appropriate, that the semiconductor component, the first insulator element, the second insulator element and/or the carrier element are disposed stacked directly one above the other in a stack-shaped and/or sandwich-shaped manner, in particular in this order.
Furthermore, it is provided, if appropriate, that the transistor has the source terminal and the gate terminal on its topside and the drain terminal on its underside.
Moreover, it is provided that the transistor bears with its underside, in particular essentially in a flat fashion, on the first electrode region of the capacitive element.
For external contact-connection, it is provided that a plurality of terminal elements are formed in the housing element.
In this case, it is advantageous that each of the terminal regions and, in particular, the gate terminal, the source terminal and the drain terminal are electrically connected to a respective terminal element.
In order to further improve the shielding properties of the capacitor device provided according to the invention, it is provided that the second electrode region of the capacitive element, is electrically connected to a dedicated terminal, in particular effecting external connection. This affords, in particular, the possibility of suppressing common-mode interference or differential-mode interference.
The housing element is advantageously formed from a potting compound or the like, in which the semiconductor component and the capacitive element are embedded.
A further aspect of the present invention consists in the fact that a semiconductor device and, in particular, a transistor device according to the present invention are provided in a converter device, in particular for a power supply device, for a switched-mode power supply and/or the like.
Modern power supplies for a wide variety of applications, e.g. for charging units, plug-in power supply units or PCs, are realized by pulsed switched-mode power supplies. Contemporary power semiconductors enable switching frequencies in the high kHz range, e.g. at 60 kHz or more. This leads on the one hand to a significant reduction in the structural volume of the system, but on the other hand to increased radio-frequency interference. In order to satisfy the required electromagnetic compatibility standards (EMC standards), the interference has to be filtered, if appropriate, with a high outlay hitherto.
The invention gives a description of the fact that the interference suppression outlay can be reduced by a novel housing concept. The latter is based on the possibility of short-circuiting the propagation path of the interference via the capacitive coupling of a carrier or lead frame of a transistor and the heat sink.
This problem has been solved hitherto by additional filter outlay, e.g. an EMI filter and additionally by the use of a shielding pad, which have to provided and mounted outside the respective device.
The shielding pad is a copper sheet that is insulated on both sides with polyamide or polyimide sheet and is coated with thermally conductive wax. The sheet is mounted e.g. between the rear side of the transistor and the heat sink. The pad combines the function of insulation of the transistor from the heat sink and of the filter between drain and source.
The incorporated copper sheet can be connected to the source terminal of the transistor in order thus to short-circuit via the high-pass filter (drain terminal of transistorxe2x80x94heat sinkxe2x80x94dielectric of insulation sheet) the propagation path into the power supply line for high-frequency interference currents.
Further capacitors are possible in the equivalent circuit diagram for the propagation path of the interference currents, which capacitors constitute a short circuit within the interference source for high-frequency currents. Propagation of the currents toward the interference sink is thus avoided.
The invention makes it possible to dispense with the shielding pad through a novel housing concept with integrated insulators, such as, for example, silicon or else ceramic disks metallized on the topside. This concept opens up the possibility of insulating the underside drain terminal of the transistor from the lead frame of the housing by insulators that are additionally integrated in the housing.
If two such insulators are integrated one above the other, then the middle metal contact-connection can be connected to the source terminal of the transistor and the same functionality as when using a shielding pad can thus be ensured.
This procedure obviates the shielding pad in the application. The costs for such a pad and additional mounting outlay are thus saved.
Additional costs that would occur would be two insulators in the housing mounting with an additional bonding wire and a possibly more complicated housing (5 terminal legs instead of 3). However, these costs are negligibly low in contrast to the savings for the overall system.
The inventive idea thus resides in a new insulated housing concept with an integrated EMC filter. The invention utilizes the possibility of short-circuiting propagation paths of high-frequency interference currents internally in the housing of the power transistor.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor device and a converter device, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.